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Job Location | Bangalore |
Education | Not Mentioned |
Salary | Rs 12 - 16 Lakh/Yr |
Industry | IT - Software |
Functional Area | Embedded / System Software,Application Programming / Maintenance |
EmploymentType | Full-time |
Able to provide test bench architecture/microarchitecture of ASIC / FPGA device at the top level and functional blocksBuild test benches and perform functional verification of RTL blocks/modules / top level and provide bug-free codeDebug RTL code, root cause functional failures in RTL codeCoverage driven verificationEducation qualificationBachelors / Masters degree in Engineering in the following disciplinesElectrical EngineeringElectronics EngineeringComputer Science EngineeringOr equivalentSkillsArchitecture, Microarchitecture of test benches for functional blocks & top levelExpert in the usage of VHDLCode & Functional coverage methodologiesExpert in scripting like PERL, Unix-shell scripting, etc. Able to provide test bench architecture/microarchitecture of ASIC / FPGA device at the top level and functional blocksBuild test benches and perform functional verification of RTL blocks/modules / top level and provide bug-free codeDebug RTL code, root cause functional failures in RTL codeCoverage driven verificationEducation qualificationBachelors / Masters degree in Engineering in the following disciplinesElectrical EngineeringElectronics EngineeringComputer Science EngineeringOr equivalentSkillsArchitecture, Microarchitecture of test benches for functional blocks & top levelExpert in the usage of VHDLCode & Functional coverage methodologiesExpert in scripting like PERL, Unix-shell scripting, etc.
Keyskills :
asic verificationfpgartl codefunctional blocksbug-free code