Design Verification Senior Staff Engineer - Automotive Functional Safety

Job Description

Infrastructure Processor Business Unit, a part of Networking and Processor Business Group, encompasses OCTEON and the award-winning OCTEON Fusion-M product families. The SoC family of multi-core CPU processors and Radio Access SoCs offer best-in-class performance, low power, rich software ecosystem, virtualization features, and open source application support with highly optimized custom ARM CPU cores providing an excellent solution for a highly flexible end-to-end optimized 5G platform.Today, Marvell-powered 3/4G solutions provide cellular coverage to over a billion people worldwide. In 5G, Marvell offers complete silicon platforms that enable all aspects of the digital processing domain. Marvell is leveraging decades of integration expertise with an unparalleled portfolio of baseband DSPs, Arm multi-core SoCs, purpose-built hardware accelerators, Ethernet connectivity engines and system-level security solutions.The PerksWith competitive compensation and great benefits, you will enjoy our workstyle within an incredible culture. We ll give you all the tools you need to succeed so you can grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page.Your FutureMarvell provides a work environment that promotes employee growth and development. We are searching for an individual who wants to grow with the company and will strive to improve performance. If you are driven, personable, and energetic, there will be additional opportunities for you here at Marvell.All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.Responsibilities:

• Work with multiple stakeholders across geographies for IP and SoC DV ownership for FuSa Automotive IPs - TB architecture definition, emulation platform discussions, TB implementation, cross TB-Emulation debug; creation, implementation and execution of test-plan (feature/performance/etc. aspects) at IP, sub-system and SoC level; own and drive IP, Sub-system and SoC-level DV strategy for a robust silicon tape-out sign-off; own and drive 3rd party VIP integration
• Participate with critical DV-oriented inputs in chip architecture discussions, design specifications and reviews and emulation plan reviews pertaining to FuSa DV scenarios
• Pro-actively seek interface with IP providers and identify adequate solutions for rapid SoC integration deployment
• Own and drive key Verification methodology initiatives with impact across multiple programs towards improved execution efficiency and zero-defect silicon outcome
• Detailed planning and tracking of the project execution as well as reporting of progress, risks, mitigation plans to stake holders
• Technically hands-on contributions along with mentoring and leadership to the staff

• BS in CS/EE with 12 or MS with 10 years of relevant experience
• Knowledge of C/C
• Ability to interface internally and externally with all levels of the organization
• Knowledge of Unix/Linux environment and scripting (shell/perl/python) is a plus
• Prior experience of key DV contributions to ARM-processor based sub-systems
• Strong in use of industry-standards flows for DV tools/methodologies
• Exposure/experience emulation set-up to support active debug
• Experienced with industry standard project planning tools
• Strong technical leadership, interpersonal and communication skills
• Must have the ability to multi-task in a fast-paced environment
• Prior experience of key DV contributions to Functional Safety DV of IPs and SoC with Fault injection, FMEDA, FMAs, DFA and Co-existence analysis
• Strong in SystemVerilog, UVM and IP verification
• Experience with DV of multi-voltage domain
• Strong in use of industry-standards flows for DV tools/methodologies related to FuSa

Keyskills :
customer supportopen sourcesoftware developmentscrum masterdeliveryproject executionaccountabilityproject planningenvironmental impact assessmentfunctional safety