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| Job Location | Bangalore |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | IT - Software |
| Functional Area | General / Other Software |
| EmploymentType | Full-time |
Develops and supports design for test DFT structures Determines design for test approaches and develops DFT architecture Designs and verifies DFT structures for memories MBIST digital and analog circuitry Performs scan synthesis Creates simulates and verifies automatic generated test patterns ATPG Creates functional tests and corresponding test patterns Knows about failure mechanisms in silicon production and creates test algorithms Supports silicon bring up of test patterns Performs diagnosis of test patterns on silicon and optimizes test timeQualificationsM Tech VLSI with 7-8 Years of experience Strong knowledge of DFT architectures methodologies which includes Scan ATPG MBIST BSCAN JTAG Boundary scan etc Strong knowledge of SoC methodology and tools VCS Mentor ATPG experience is a plus Knowledge of Physical design is advantageous Experience in Verilog System Verilog RTL design Strong debug skills and experiences in Perl TCL scripting are a must Strong Communications skills and the ability to work with minimum supervision In addition this position requires interaction and fulfilling the requirements of Intels postsiliconATE teams Silicon Debug and understanding HVM High Volume Manufacturing requirementsInside this Business GroupThe Core and Client Development Group (C2DG) is a worldwide organization focused on the development and integration of SOCs, Core , and critical IPs that power Intels leadership products, driving most of the Client roadmap for CCG, Delivering Server First Cores that enable continued growth for DCG and invest in future disruptive technologies.,
Keyskills :
atpgdftscancoresiliconcontinuous improvement facilitationrtl designboundary scansystem verilogphysical designclient development