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GFX Verification Engineer - SMTS

8.00 to 0.00 Years   Bangalore   01 Jul, 2022
Advanced Micro Devices, Inc
Job LocationBangalore
EducationNot Mentioned
SalaryNot Disclosed
IndustryTelecom / ISP
Functional AreaSales / BD
EmploymentTypeFull-time

Job Description

    What you do at AMD changes everythingAt AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies building blocks for gaming, immersive platforms, and the data center.Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the extra mile to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.Role: We are currently seeking a highly skilled Senior verification engineer (SMTS) to work on memory/texture subsystem blocks in India. In this role, he/she would be drive verification closure of one of Texture subsystem blockMeeting the demands of the constantly evolving project schedule, the successful candidate will be a member of the GFX IP team responsible for developing and delivering IP to various BUs. He/she will demonstrate passion toward design, design verification, be a teammate, a problem solver with independence, creativity and interpersonal skills. Responsibilities:
    • Senior verification engineer driving features of Texture/Memory sub system blocks verification
    • Working with architects and design leads and driving quality test plans
    • Developing verification infrastructure and improvements
    • Working with power architects and defining test patterns to able to build required power profile
    • Driving DV closure to meet schedules with quality
    • Mentoring Junior team on these blocks
    • Helping management with risk assessment on features and schedules
    • Working closely with texture sub-system DV lead for overall improved methodology of sub-system verification (including blocks).
    • Working with memory sub-system DV lead to identify potential areas of formal verification
    Requirements:
    • BS +10 years or MS + 8 years work experience preferred.
    • Experience with advanced verification methodologies and languages like UVM, system Verilog.
    • Familiarity with all Design areas and tools and confirmed understanding of design/technology interactions
    • Good understanding of memory hierarchy, caches, address translations schemes.
    • Good understanding of general dram technologies and address translation schemes
    • Familiarity with GFX pipeline and GPU design is plus
    • Familiarity with Computer organization/architecture.
    • Strong analytical/problem solving skills and pronounced attention to details.
    • Must be a self-starter, and able to independently drive tasks to completion.
    • Good teamwork and communications skills are required
    ,

Keyskills :
pipelinedesign verificationsolverclosurerisktechnical compliancescheduleteamworkdesignuvmfailure analysisverificationchanging the worldgraphicsrisk assessment

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