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| Job Location | Bangalore |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | IT - Hardware / Networking |
| Functional Area | General / Other Software |
| EmploymentType | Full-time |
Requirements :1. Solid DFT insertion knowledge for both MBIST and ATPG using tessent shell-based tools2. Pre-scan and post-scan DRC analysis and debug experience required3. Strong fundamentals in DFT HW structures like EDT, OCC etc., and ATPG3. Coverage and pattern-count analysis for complex blocks to understand, debug and close holes in coverage and opportunities in pattern-count and QoR improvement4. Simulation of MBIST and ATPG patterns with and without timing at the gate-level required5. Basic STA knowledge to sanitize timing constraints for DFT modes and check timing.6. Working with Physical Design team to close timing.Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.,
Keyskills :
occgsmdesigncontrollingsimulationfftstaanalysiscolorphysical designrecordsbasicatpgtimingdftdrcreligiondiagnosticsmedicalcadence