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Lead Design Engineer(PO-234-OP)

2.00 to 7.00 Years   Bangalore   22 Apr, 2022
Cadence Design
Job LocationBangalore
EducationNot Mentioned
SalaryNot Disclosed
IndustryIT - Software
Functional AreaGeneral / Other Software
EmploymentTypeFull-time

Job Description

    At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
    • The role requires working with the existing functional verification environment, addition of new features into the verification environment, ensuring various customer configurations are clean as part of verification regressions. Sometimes there may also be need to support customers in case of any issues with design.
    • Participate in Technical alignment with verification expert in Defining verification strategy, architecting verification environment.
    • Contribute towards Defining, developing and deploying new functional verification methodologies.
    • The engineers should have strong background in functional verification fundamentals, verification environment planning & development, test plan creation.
    • Prior Digital verification experience in some of the serial bus multiprotocol PHY IP s ( SerDes IP especially PCI and other protocols) is expected.
    • Other verification domain skills:
    -Strong expertise in Verilog, HVL( SV, e) with UVM/OVM/eRM methodology-Experience in assertions development/closure, constraint randomization, functional coverage, code coverage.-Strong RTL and GLS debug skills.
    • Expertise in more than two of following skills is desirable and added plus:
    -Power-aware RTL set-up, simulation and debug-Formal verification.-Gate-level simulations.-Good to have (not must have): Some experience or understanding of Analog modelling. Mixed-mode simulations with Analog/digital ( AMS) ,-Some exposure to Automotive IP verification (fault injection), emulation exposure though not mandatory but good to have. We re doing work that matters. Help us solve what others can t. ,

Keyskills :
catia v5autocaddrawingweldingbomfunctional verificationrtlbusglsserdesverilogstrategyplanningadditionfeaturesalignmentpci

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