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Manager Silicon Design Engineering

5.00 to 10.00 Years   Bangalore   27 Oct, 2022
Job LocationBangalore
EducationNot Mentioned
SalaryNot Disclosed
IndustryTelecom / ISP
Functional AreaR&D / Product Design
EmploymentTypeFull-time

Job Description

    Experienced Design Verification: The successful candidate will lead AMDs System Management Unit (SMU) IP Verification team. As a leader of verification team, you will own and guide the development and verification SMU subsystem. This group owns digital hardware verification and embedded software debug. Your hands-on mentorship of the small and hardworking verification engineering team will improve hardware and software security, cryptography, and computer architecture through development of the secure boot and initialization firmware.The Person An experienced verification manager who can lead the team to successful tape-outs. This person has strong interpersonal and communication skills and works well as a mentor to collaborate with our SoC integration and SoC DV teams. We value high analytical and problem-solving skills with close attention to detail.Key Responsibilities: Lead the pre-silicon functional verification team, team with mandate to perform Hardware/Firmware co-verification using UVM System Verilog and C-DPI structured testbenchBuild test plans and drive verification and debug of embedded boot firmware functionality to complete functional test and code coverage goalsDevelop and modify the System Verilog and C driven testbench and bus functional models as required to manage the verification processDevelop and execute subsystem tests using FW/HW co-verification methodology; and improve verification metricsDebugging test failures to determine if it is a design or verification test defect, correcting test issues and working with the design team to correct defectsCollaborate with project manager and leaders on the subsystem verification delivery against the milestone requirements and regression metricsCollaborate with team technical leads and architects on process, methodology and technical enhancements to design verification, to drive continuous improvement and positive changePreferred Experience: Proven experience in verifying commercially successful IPs, Subsystems and or SoCsStrong ability to provide mentorship and guidance to junior and senior engineers, a very effective team player, must have strong technical management skills and provide a positive influence on team morale and cultureMust be expert in System Verilog, UVM and proficient in C-DPI methodology [AMD Official Use Only] Proficient in object-oriented programming (C++), scripting (Ruby, Python, Perl), and low-level programming languagesExcellent knowledge about standard bus/interface protocols (i.e., AXI, AHB, AMBA)Must be a self-starter, and able to drive independently and efficiently challenge time-critical tasks to on-time completionStrong communication, time management, and presentation Skills. Academic CredentialsMajor in Electronics and/or Computer EngineeringMaster s Degree preferred Location: Hyderabad, India,

Keyskills :
drawingautocaddraftingmodelingcaddata centercode coveragesystem verilogproblem solving

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