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MTS Silicon Design Engineer

6.00 to 11.00 Years   Bangalore   01 Jul, 2022
Job LocationBangalore
EducationNot Mentioned
SalaryNot Disclosed
IndustryTelecom / ISP
Functional AreaR&D / Product Design
EmploymentTypeFull-time

Job Description

    What you do at AMD changes everythingAt AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies building blocks for gaming, immersive platforms, and the data center.Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the extra mile to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.Responsibility:
    • Design and develop RTL code for High speed mixed signal IPs like DDR, LPDDR and GDDR in Verilog HDL and make sure it is functionally correct and optimal for backend implementation for speed, area and power targets.
    • Conduct design reviews of designs in technical presentations to peers and management
    • Oversees Synthesis and netlist delivery that meets timing, area and power bounding box. Assist physical design team on the floor-planning and timing closure.
    • Work with Design Verification team to ensure quality for architecture definition and design implementation.
    Requirement:
    • MS or BS in Electrical Engineering/Computer Engineering/ Computer Science with 6 to 11 years working experience in ASIC design industry.
    • Knowledge in computer architecture and interconnects.
    • Experience in high speed IO design (e.g. DDR, USB, PCIe, SATA, Ethernet). Experience with DDR or other high speed PHY is desirable.
    • Experience in full ASIC design cycle: Understanding spec requirement, RTL, design verification, floor-planning, synthesis, timing closure, power intent, post-silicon validation
    • Expert on Verilog RTL design and has experience of large digital ASIC project.
    • Familiar with front-end EDA tools and flows especially RTL quality check tools like CDC, Lint and conformal low power
    • Familiar with Unix/Linux and scripts (tcl, perl, ruby and etc.)
    • Excellent interpersonal, communication, and writing skills. Able to provide clear and logical presentations and documentation. Has an open mind and attitude. Transparent. Willing to admit and learn from mistakes.
    • Works well with others in a team environment
    • Work is performed with limited supervision. Strong sense of task scheduling and deliver on time as committed milestones.
    ,

Keyskills :
quality checkverilog hdlphysical designdrawingmixed signalautocad

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