Physical Design Engineering Manager

Job Description

Job ID: JR0145337Job Category: EngineeringPrimary Location: Bangalore, KA INOther Locations:Job Type: Experienced HirePhysical Design Engineering ManagerJob DescriptionAs a manager, set priorities for the team, get results across boundaries, ensure an inclusive work environment, develop employees, and manage performance. Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Performs all aspects of the SoC design flow from highlevel design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing. Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results. May also review vendor capability to support development. Selects, develops, and evaluates SoC design engineers to ensure the efficient operation of the function.QualificationsIn this position you will be part of a world class Networking (Ethernet NIC) SoCs design team responsible for managing Physical design and development of the Smart/Foundational Network Interface Controller IPs/SoCs of the Networking Silicon Design Group. This is a great opportunity to join a talented team and will include lots of product innovation on cutting edge technologies. * Responsible for driving fullchip Physical Design Execution from Bangalore site, activities include: Partition Execution, Physical Integration, STA, Physical/Reliability sign-off, flow development/customization. Vertical assignments such as IP hardening or product SD ownership - full responsibility for physical design of the respective IP/product * Closely collaborate w/ Frontend teams developing the same IP/product as well as physical design teams in other locations e.g. US/ISR * Solid track record of taping out more than 2 chips on advanced process technology nodes such 7/10nm. * Should have experience in Industry tools such as ICC and thorough technical understanding of backend challenges such as Place and route on advanced process nodes, Static Timing Analysis for High frequency designs, Formal Verification, Low Power Verification etc. * Ability to lead and manage large group of people ~40 (direct/matrixed/Contract workers), and solid communication skills is a must. Proven managerial experience, driving and leading engineering teams, ability to build and ramp and organization, driving it from formations to performance. * Should be capable of providing status updates to Sr. Management at VP/Sr. VP levels and should be able to manage ambiguity and schedule challenges. * Must be a team player. Understanding of overall chip design cycle and Frontend design experience will be a major plus. Qualifications: * Bachelors/Masters in Electrical, Electronics or Computer Engineering or other related field of study with 13-15 years of relevant experience in the Physical/Structural Design and ManagementInside this Business GroupThe Data Center Group (DCG) is at the heart of Intel s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies spanning software, processors, storage, I/O, and networking solutions that fuel cloud, communications, enterprise, and government data centers around the world.Legal Disclaimer:Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at www.jobs.intel.com and not fall prey to unscrupulous elements.INExperienced HireJR0145337Bangalore,

Keyskills :
product innovationfront enddrclogic designdesign engineeringfloor planningroutingverificationtiming analysischip designdesign flowdata centerphysical designstatic timing analysis