RTL Design Engineer (USB IP Development)

3.00 to 6.00 Years Bangalore 02 Dec, 2020

Job Location	Bangalore
Education	Not Mentioned
Salary	Not Disclosed
Industry	IT - Software
Functional Area	General / Other Software
EmploymentType	Full-time

Job Description

RTL Design Engineer for USB IP development team.
Position is based in Bangalore.
The role would include design and support of the RTL of the USB 2.0/3.1,XHCI, IP solution of Cadence.
The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are clean as part of verification regressions, supporting customers, ensuring design is clean for LINT and CDC design guidelines.

Position Requirements:

BE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer, with a large portion of the recent work experience on RTL design and development.
RTL Design using Verilog is a must.
System Verilog experience and experience with UVM based environment usage / debugging is required.
AXI3/4/5 experience is a desired.
USB 2.0/3.1/XHCI experience is highly desirable. Prior experience in RTL design and implementation of complex protocols is a must.
Prior experience in IP development teams would be an added advantage.

We re doing work that matters. Help us solve what others can t.,

Keyskills :
verilogfpgaxilinx isehdlaltera quartusrtl designrtluvmusbcdcvlsilintdesignadditionfeaturesdebuggingprotocolselectronicscadence

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RTL Design Engineer (USB IP Development)

Job Description

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