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Job Location | Bangalore |
Education | Not Mentioned |
Salary | Not Disclosed |
Industry | Telecom / ISP |
Functional Area | General / Other Software |
EmploymentType | Full-time |
RESPONSIBILITIES: - Drive new memory system architectures from DRAM up.- Explore architecture trade- offs in system performance, area, and power consumption.- Develop interconnect (Network- on- chip - NOC) and memory hierarchies for high performance parallel computer architectures (system- on- a- chip SOC) .- Add virtualization capabilities to the system.- Develop performance simulators, models and test suites.- Develop functional simulators, models and test suites.MINIMUM REQUIREMENTS: - MS or PhD in a relevant area.- A demonstrated history of technical leadership.- 5 years of architecture research and/ or development of memory or highly interconnected system architectures.- 5 years of research and development experience in performance analysis, tools, or simulators.- 5 years of C/ C development.- Knowledge of high performance memory system or interconnect architectures, experience with various virtualization techniques, including performance modeling and functional modeling and analysis.- Systems experience in characterizing performance, doing comparison studies, and documenting and publishing results.- Ideal candidates will have experience in High- Performance Computing (HPC) , Virtualization, Memory Hierarchies, Interconnect Architectures, and System Architecture,
Keyskills :
automationcustomer relationsagileresearchdevelopmentcommercial modelsdigital conversionidealresearchanalysisarchitectureinterconnectvirtualizationnetwkingperfmance analysishistperfmance