Sr. Physical Design Engineer

Job Description

Job ID: JR0176390Job Category: EngineeringPrimary Location: Bangalore, KA INOther Locations:Job Type: Experienced HireSr. Physical Design EngineerJob DescriptionThe Sr. Physical Design Engineer is a Technical Leadership position in Intels Design Engineering Group. In this unique position, you will own delivering PDFD (Physical Design for Process and Product Debug) and Metal-ECO (Engineering Change Orders) solutions for all Intels Si products using TSMC technology as well as test chips on next-generation process nodes. This includes developing FIB bonus, fiducials, EDM, and Metal-ECO collaterals. The position requires expansive knowledge in Layout Design and Release Flows, Circuit Design, and Physical Si Process and Product Debug. Tasks cover all aspects of physical design including but not be limited to: Perform layout of cells and custom test chip structures, Manage library collaterals across all TSMC process technologies, Perform independent assessment and planning of complex layout tasks, including scheduling, progress monitoring, and facilitation, to enable efficient and predictable design delivery to commit. Lead PPA (Power, Performance, and Area) invasiveness studies. Establish and implement physical specifications to meet engineering and process requirements. Contribute to Intel-wide methodology definition, correct-by-construction constraint establishment, and productivity initiatives. Behavioral traits: Excellent communication (written and verbal) and presentation skills.Self-starter with the ability to work across multiple teams and geographies.QualificationsYou must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications:BS degree EE, CS, CE with 4+ years of relevant experience OR Masters degree EE, CS, CE or related discipline with 2+ years of relevant experienceExtensive knowledge of Industry Design tools e.g. Synopsys (ICC/ICC2/ICV/Fusion), Mentor (Calibre), Cadence (INNOVUS)Strong Automation and Programming skills (e.g. Tcl, UNIX script, Perl, Python).Expertise in TSMC manufacturing processes technologies and design environments.Deep Analog and digital schematic/layout design techniques.Knowledge of floor planning, integration, layout design rule and schematic and/or layout comparison debug and correctionExperience of layout optimization for Performance and Reliability Verification (Timing, Noise, circuit robustness).Must have permanent unrestricted right to work in Costa RicaAdvanced English levelPreferred Qualifications:Hands-on experience in design from RTL to GDS-II delivery.Knowledge of Si debug equipment including FIB, SEM, Optical Probing, Micro Probing, and related electrical measurement tools.Knowledge of DFT and testing techniques (e.g. scan, array test, BIST modes).Inside this Business GroupManufacturing and Product Engineering (MPE) is responsible for test development across product segments, supporting 95% of Intels revenue. We deliver comprehensive pre-production test suites and component/physical debug capabilities to enable high quality, high volume manufacturing.Legal Disclaimer:Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at www.jobs.intel.com and not fall prey to unscrupulous elements.INExperienced HireJR0176390BangaloreManufacturing and Product Engineering (MPE),

Keyskills :
floor planningdrcroutingverificationtest suiteslayout designcircuit designphysical designtest developmentdesign engineeringsystem integratorsproduct engineering