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Sr. Silicon Design Engineer

10.00 to 15.00 Years   Bangalore   27 Apr, 2022
Advanced Micro Devices, Inc
Job LocationBangalore
EducationNot Mentioned
SalaryNot Disclosed
IndustryTelecom / ISP
Functional AreaEngineering Design / ConstructionGeneral / Other Software
EmploymentTypeFull-time

Job Description

    What you do at AMD changes everythingAt AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies building blocks for gaming, immersive platforms, and the data center.Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the extra mile to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team. THE ROLE:
    • As Part of the IP design team you will have technical responsibility for IP/sub-system development, SoC integration efforts.
    • You will be responsible for the design of RTL blocks in verilog, which encompasses integration of 3rd party IP as well as some custom logic design
    • Throughout the project you will be involved in SOC and IP design and feature enhancements, top-level SOC latency and performance impact
    • You will lead a discipline within design team and also will be responsible for overseeing or performing structural checks such as verilog lint checks, and power domain and clock domain checks as appropriate
    • You will work with verification teams for simulation and debug of issues related to the subsystem design.
    • You will work with front-end integration teams on synthesis of the SOC top-level netlist and also collaborate with physical design.
    THE PERSON:
    • Strong self-driving ability
    • Should have excellent communication skills (both written and oral)
    • Strong problem-solving skills
    KEY RESPONSIBILITIES:
    • Execute on RTL design and coding for various sections for the SOC and related logic
    • Integrate IP RTL blocks, eg Integration of IP, SOC level fabric, voltage and clock crossings, clocks, resets, fuses, I/O
    • Work collaboratively with other members of the IP team who perform design verification, implementation (synthesis, constraints, static timing analysis), and delivery to SOC
    • Partner with SOC teams to support the IP at SOC level, including connectivity, DFT, verification, physical design, firmware, and post-silicon bring-up
    • Static verification of design (RTL, CDC, Power, Connectivity)
    PREFERRED EXPERIENCE:
    • Experience in Verilog RTL development with industry tools in a CPU, SOC or ASIC environment
    • SOC architecture understanding
    • System bus protocol understanding (e.g. AXI, PCIe etc)
    • Proficiency in verilog/system verilog RTL logic design of high-speed, multi-clock digital designs
    • Experience with 3rd party IP integration
    • Experience in power implementation methodology, UPF
    • Static timing analysis
    • Experience working with physical design team and aware of physical design requirements
    • Comfort with Scripting such as Ruby, Perl, Shell and TCL is a plus
    • Expertise in formal verification techniques and tools
    ACADEMIC CREDENTIALS:
    • 10+ years of experience in SOC/Subsystem Design and Verilog RTL Development
    • BE/B.Tech/ME/M.TECH or equivalent ECE/EEE
    LOCATION: Bangalore

Keyskills :
logic designmodelingfront enddraftingchanging the worldrtl designdrawing

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