Test Chip Package Architect

Job Description

Job ID: JRhidden_mobileJob Category: Engineering SupportPrimary Location: Bangalore, KA INOther Locations:Job Type: Experienced HireTest Chip Package Architect Job Description The world is transforming - and so is Intel! Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. We work every single day to design and manufacture silicon products that empower peoples digital lives. Do you love to solve technical challenges that no one has solved yet Do you enjoy working with cross functional teams to deliver solutions for products that impact customers lives If so, Come join us to do something wonderful!In this position, you will be a part of the testchip team in IPG. This team develops testchips to validate IP for future Intel products.Responsibilities will include but not limited to:Cordinate package architecture and design efforts for the IPG testchip roadmapExecute package design to meet overall package performance and specification and realize technology certification through layout design and test vehicle design.Provide inputs to package design teamsWork directly with IP teams to gather requirements and capabilities for IP blocksDevelop post-silicon strategies for HVM and bench level testingCoordinate with board design teams to insure the IP and testchip requirements are metRegularly review and provide input on board designs and package designsCollaborate with broad team of testchip partners to insure successful testchip power-onQualifications You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: Candidate must have a Bachelors Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 4+ years of experience - OR - Masters Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 3+ years of experience in: Platform and system design Signal integrity and power delivery Assembly (electronic packaging) and substrate manufacturing technologies Preferred Qualifications: experience with: Silicon floor planning and development Cadence/Mentor package/board design tools.Inside this Business Group IP Engineering Groups (IPG) vision Build IPs that power Intels leadership products and power our customers silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intels silicon design process. IPGs guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.Legal Disclaimer:Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at www.jobs.intel.com and not fall prey to unscrupulous elements.INExperienced HireJRhidden_mobileBangaloreIP Engineering Group (IPG),

Keyskills :
continuous improvement facilitationboard designsystem designlayout designfloor planningpower deliverycomputer sciencesignal integritybehavioral trainingelectrical engineeringertmscolordesignips