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Designing Verification Engineer (WFH)

5.00 to 10.00 Years   Chennai, Noida, Hyderabad, Gurugram   12 Jun, 2022
GFL RECRUITMENT PRIVATE LIMITED
Job LocationChennai, Noida, Hyderabad, Gurugram
EducationNot Mentioned
SalaryNot Disclosed
IndustryIT - Software
Functional AreaIT Operations / EDP / MIS
EmploymentTypeFull-time

Job Description

    Designing Verification Engineer (WFH)1. Develop IP/SOC verification strategies according to chip design specifications.2. Analyze verification requirements, build a SOC/IP verification environment, add test cases, and converge coverage.3. Responsible for RTL level simulation and netlist simulation.4. Cooperate with design, FW, and FPGA to locate problems.5. Output verification report, function coverage report, code coverage report.Job requirements:1. Bachelors degree or above in microelectronics, computer, electronics, and other related majors.2. Familiar with the chip development/verification process, and master UVM verification methodology.3. Familiar with Verilog, SystemVerilog, C language.4. Proficiency in using simulation tools such as VCS/Verdi, and proficient in using various VIPs.5. Able to independently build a verification platform, complete system or module-level verification, test point decomposition, and code/function coverage analysis.6. Verification experience in PCIE/NVME/ONFI/DDR/SOC is preferred.Education/ExperienceExperience level: 5+ years of experienceDepartment: ASIC design verificationSkills needed: System Verilog, Verilog, Digital electronics, C based SOC verification, and IP verificationLocation: Currently remote work available, Once after pandemic need to travel to Shanghai, China. Flight and VISA processes and expenditures will be taken care of by the company.

Keyskills :
system verilogverilogip verificationdigital electronics

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