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| Job Location | Chennai |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | Not Mentioned |
| Functional Area | Not Mentioned |
| EmploymentType | Full-time |
Job-Duties:Implementation of compiler transformations and optimizations in C++Understand and master concepts related to synthesis of SystemC/C++ designs and formal verificationCollaborate and coordinate with other engineering teamsMust haveTechnical SkillsExpert in C++, design patterns and algorithmsKnowledge of one of the scripting languages like Perl, Python, TclWorking knowledge of all the development tools like gdb, valgrind, makefiles, editors, IDE, etc.Experienced in the development and delivery of a multi man-month project.Soft skillsSelf-motivatedTeam playerGood problem solving and analytical skillsHard working, sincere and committed to workProvide and take constructive feedbackGood to haveExposure to Synthesis, Simulation and other verification methodologies.Fair understanding in one of the HDL (Verilog, System Verilog, VHDL or SystemC)Basics of Compiler Transformation and OptimizationsEducation: B.Tech or M.Tech in CSE/EE/ECE from a reputed engineering college. Organization: Digital Industries Company: Mentor Graphics (India) Private Limited Experience Level: Mid-level Professional Job Type: Full-time.
Keyskills :
cost reductioninspectionkanbanmarketingsafetysystem verilogproblem solvingdesign patternsdevelopment toolsgdbhdlideperlvhdlpythondesignveriloggraphicsmentor graphics