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SoC Full-Chip Timing Lead

12.00 to 14.00 Years   Hyderabad   16 Jun, 2021
Intel Technology India Pvt Ltd
Job LocationHyderabad
EducationNot Mentioned
SalaryNot Disclosed
IndustryIT - Software
Functional AreaGeneral / Other Software
EmploymentTypeFull-time

Job Description

  • Lead Full Chip Timing for Subsystems and/or SoC with full ownership from Spec to Tape out. Must have experience on 10nm and below technology nodes.
  • Responsible for schedule & quality goals.
  • Drive and define Timing signoff criteria, methodology, constraints, constraints signoff, ACIO spec definition, ACIO signoff and structural checks impacting timing.
  • Drive the Technical Readiness tasks to achieve best convergence methodology, global network definition for debug and testing and IP specific custom checks.
  • Expertise in all Full chip timing Activities (Constraints, Tools, Flows, ECO methodology etc ).
  • Strong expertise in Primetime is preferred.
Additional skills include:
  • Hands-On experience with domain relevant industry standard tools like ICC, ICCII, Redhawk, ICV, Calibre, Conformal, Spyglass-LP, Power Artist Etc.
  • Good understanding and exposure of overall SoC Cycle.
  • Good scripting skills in TCL/Perl/Shell to automate tool/flow methodologies.
  • You must also possess strong initiative, analytical/problem solving skills, team working skills, ability to multitask and be able to work within a diverse team environment.
  • You shall be self-motivated with the initiative to seek constant improvements and driving new methodologies in the domain expertise.
Qualifications
  • You must possess a Bachelor of Engineering degree or Master of Engineering in Electrical and/or Electronics Engineering with 12 Years of relevant experience with the skills in Timing Closure of large and complex SoCs.
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Keyskills :
internet of thingsnew businesstiming closurebehavioral trainingindustrial automationcustomer requirementselectronics engineeringsocioteco

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