SOC Physical Verification Lead

Job Description

Job ID: JR*******Job Category: EngineeringPrimary Location: Hyderabad, INOther Locations: India, BangaloreJob Type: Experienced HireSOC Physical Verification LeadJob DescriptionLead Layout verification execution of partitions/subsystems/SoC with full ownership from floorplan to TI. Must have experience on 10nm and below technology nodes. Must have gone through multiple tapeouts with end-to-end ownership of Physical verification. Responsible for schedule and quality goals. Develop Tcl and Perl script automations to efficiently implement layout edits in PR or APR designs. Develop plans and implement audit of incoming layouts, thereby set minimum acceptable criteria. Provide timely feedback to design teams on layout quality throughout design phase of a project. Liaison with PDK, Tools, flow and Methodology teams along with other stakeholders to pre-empt issues and to be abreast of latest changes in foundry rules. Responsible for stake holder management inside and outside D2S organization.Right Candidate will bring-in 12+ years of technical experience in the layout integration, netlisting, layout clean-up, verification and final tapeout activities on high-end SOCs such as Server CPUs/SOCs, Graphics SOCs or SOCs in AI Space on 10nm, 7nm or 5nm or other advanced foundry processes. The candidate must be a good problem solver and with agile/fast moving mindset and customer oriented.Additional skills include:-Hands-On experience with domain relevant industry standard tools like ICCII, ICV, Calibre, ICWBEV,Good understanding and exposure of overall SoC Cycle.Good scripting skills in TCL/Perl/Shell to automate tool/flow methodologies.You must also possess strong initiative, analytical/problem solving skills, team working skills, ability to multitask and be able to work within a diverse team environment.You shall be self-motivated with the initiative to seek constant improvements and driving new methodologies.Excellent communication skills are must.QualificationsYou must possess a Bachelor of Engineering degree or Master of Engineering in Electrical and/or Electronics Engineering with 12+ Years of relevant experience with the skills in Layout verification domains.Inside this Business GroupEmployees of the Internet of Things Solutions Group (IOTG) have an exciting opportunity before them: To grow Intels leadership position in the rapidly evolving IoT market by delivering the best silicon, software and services that meet a wide range of customer requirements - from Intel Xeon to Intel Quark . The group, a fresh, dynamic collaboration between Intels Intelligent Solutions Group and Wind River Systems, utilizes assets from across all of Intel in such areas as industrial automation, retail, automobiles and aerospace. The IOTG team is dedicated to helping Intel drive the next major growth inflection through productivity and new business models that are emerging as a result of IoT.Other LocationsIndia, BangaloreLegal Disclaimer:Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at www.jobs.intel.com and not fall prey to unscrupulous elements.INExperienced HireJR*******HyderabadInternet of Things Group, Job ID: JR0196392Job Category: EngineeringPrimary Location: Hyderabad, INOther Locations: India, BangaloreJob Type: Experienced HireSOC Physical Verification LeadJob DescriptionLead Layout verification execution of partitions/subsystems/SoC with full ownership from floorplan to TI. Must have experience on 10nm and below technology nodes. Must have gone through multiple tapeouts with end-to-end ownership of Physical verification. Responsible for schedule and quality goals. Develop Tcl and Perl script automations to efficiently implement layout edits in PR or APR designs. Develop plans and implement audit of incoming layouts, thereby set minimum acceptable criteria. Provide timely feedback to design teams on layout quality throughout design phase of a project. Liaison with PDK, Tools, flow and Methodology teams along with other stakeholders to pre-empt issues and to be abreast of latest changes in foundry rules. Responsible for stake holder management inside and outside D2S organization.Right Candidate will bring-in 12+ years of technical experience in the layout integration, netlisting, layout clean-up, verification and final tapeout activities on high-end SOCs such as Server CPUs/SOCs, Graphics SOCs or SOCs in AI Space on 10nm, 7nm or 5nm or other advanced foundry processes. The candidate must be a good problem solver and with agile/fast moving mindset and customer oriented.Additional skills include:-Hands-On experience with domain relevant industry standard tools like ICCII, ICV, Calibre, ICWBEV,Good understanding and exposure of overall SoC Cycle.Good scripting skills in TCL/Perl/Shell to automate tool/flow methodologies.You must also possess strong initiative, analytical/problem solving skills, team working skills, ability to multitask and be able to work within a diverse team environment.You shall be self-motivated with the initiative to seek constant improvements and driving new methodologies.Excellent communication skills are must.QualificationsYou must possess a Bachelor of Engineering degree or Master of Engineering in Electrical and/or Electronics Engineering with 12+ Years of relevant experience with the skills in Layout verification domains.Inside this Business GroupEmployees of the Internet of Things Solutions Group (IOTG) have an exciting opportunity before them: To grow Intels leadership position in the rapidly evolving IoT market by delivering the best silicon, software and services that meet a wide range of customer requirements - from Intel Xeon to Intel Quark . The group, a fresh, dynamic collaboration between Intels Intelligent Solutions Group and Wind River Systems, utilizes assets from across all of Intel in such areas as industrial automation, retail, automobiles and aerospace. The IOTG team is dedicated to helping Intel drive the next major growth inflection through productivity and new business models that are emerging as a result of IoT.Other LocationsIndia, BangaloreLegal Disclaimer:Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at www.jobs.intel.com and not fall prey to unscrupulous elements.INExperienced HireJR0196392HyderabadInternet of Things Group,

Keyskills :
internet of thingsnew businesscorporate liaisonbehavioral traininglayout verificationcommunication skillsindustrial automationphysical verificationcustomer requirementsstakeholder management