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Non-Volatile Memory (NVM) Technologist/Engineer

3.00 to 5.00 Years   Kolkata   12 Oct, 2022
Job LocationKolkata
EducationNot Mentioned
SalaryNot Disclosed
IndustryConsumer Durables / Electronics
Functional AreaGeneral / Other Software
EmploymentTypeFull-time

Job Description

    NVM Bit Cell Architect with supporting Process Integration & Device Engineering skillsEngage with Business Units (BU) to support of onsemi roadmaps and guide integration of NVM solutions into IC technologiesOwnership of bit-cell development, process integration flows and NVM device development from initial design to early volumeDevelop NVM specific CMOS and/or HV Devices as required for IP developmentCollaborating with NVM design IP development teams to provide inputs/develop fully functioning IPWork with design and test/product engineering teams to establish NVM test specs and characterization requirementsSupport IC design and layout teams with process & device knowledge, implementing SOA boundary conditions as neededTest structure design and characterization to enable new device modules and performance optimizationNVM mini-array design, layout and characterization for bit-cell developmentDevelop NVM IP/Device isolation strategies to meet technology requirements as neededSupporting NVM yield optimization and NVM reliability/product qualificationPerformance Objectives:Architect new EEPROM or NVM bit-cells for new technologies that meet BU requirementsCreate devices required for full functionality of NVM for e.g, NLDMOS devices, Capacitors, State Transistor, etcCreate roadmaps for future technologiesPerform required NVM TCAD device simulations using Sentaurus or similar toolsProvide inputs to NVM IP teams to help design fully functioning IPCreate test specification for NVM devices and mini-arraysDesign NVM mini-array layout variants for final bit-cell selection post characterizationAnalyze collected test and REL data for developed devices and NVM arraysCreate reports and documents that describe developed NVM technologyPresent generated reports to various stakeholders, *Bachelors/Master s/PhD degree in Electronics, Physics, Materials Engineering, or equivalent, and a minimum of 3-5 years experience in OTP, MTP, EEPROM and other NVM technologiesDetailed knowledge of NVM and device physics, cell array characterization, test & reliabilityExcellent track record in planar technology development, process integration from 180nm to 40nmExperience with process and device manufacturing trade-offs including DFM strategiesExcellent working knowledge of device physics and reliabilityStrong data analysis skills to analyze and propose alternative courses of action for resolution of technical problemsExcellent verbal and written communication skillsKnowledge of key IC design, device and process requirementsAbility to handle multiple projects and deadlines, and work efficient as part of a team or independently#LI-DS1

Keyskills :
handle multiple projectscontinuous improvement facilitationic designdata analysisbusiness units

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