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| Job Location | Bangalore |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | IT - Software |
| Functional Area | Engineering Design / Construction |
| EmploymentType | Full-time |
In this role candidate will be leading static timing analysis tools/flow and methodology development/deployment, which involves developing methodologies to support new process nodes as well as design features. Role will encompass enabling timing analysis flow, through automated scripting and manual testing, for a team that focuses on enabling Intel technology R&D . This role will have opportunity to be one of the first people to enable timing flows on Intels new technology and be positioned to influence how the technology and design methodologies are defined for Intels new process nodes by developing innovative testcases for continuous integration in a design environment and writing automation that can identify potential quality issues in timing flow and better correlation of timing analysis with silicon. He /She will also be supporting Design team to debug and resolve issues and improve flow to ensure timely completion of projects with high quality timing sign off. He / She needs to work with internal and external stakeholder as per projects needs and guiding engineers to debug and resolve complex flow and design issues.QualificationsCandidate should have masters in Microelectronics/ Electronic engineering with 8+ years of experience or equivalent. He / She should have worked on Static timing analysis and sign off tools/flow and methodology on Industry standard sign off tools like Primetime, ETS. Candidate also should have deep understanding of process technology at 10nm and below, low power methodology and expertise in timing analysis at transistor and full chip level. Candidates should have good knowledge of collateral needed for Timing analysis and various options of enabling different corners and modes of signing analysis Working knowledge of Synthesis and Place and route tools/ like ICC2, Fusion compiler (implementation tool) is good to have skill set.,
Keyskills :
autocadcadauto caddraftingdrawingstatic timing analysiscontinuous improvement facilitationtest casessupply chainmanual testingtiming analysis