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| Job Location | Noida |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | Manufacturing |
| Functional Area | Embedded / System Software,General / Other Software |
| EmploymentType | Full-time |
eNXP Semiconductors N.V. (NASDAQ: NXPI) enables secure connections and infrastructure for a smarter world, advancing solutions that make lives easier, better, and safer. As the world leader in secure connectivity solutions for embedded applications, NXP is driving innovation in the automotive, industrial & IoT, mobile, and communication infrastructure markets. Built on more than 60 years of combined experience and expertise, the company has over 29,000 employees in more than 30 countries and posted revenue of $8.88 billion in 2019.Specific skills & knowledge:Technical Excellent knowledge Digital Front End design flow for o preferably RTL Verilog and VHDL based o Fluency in design & verification languages such as VHDL, Verilog, C and System Verilog o Exposure to Low-power and/or High-Power design and UPF methodology o Experience in front-end design of complex multi clock domain blocks o Experience in Spyglass for lint and CDC checks o Experience in Synthesis/LEC flows o Skilled in EDA test regression tools associated to Digital Front End Flow as vManager cadence tools o Skilled in EDA tools associated to Digital FE from Cadence and / or Synopsys Good Knowledge TCL / Shell / PERL / Cadence SKILL/ Python Scripting Good IT infra and LSF skillsBehaviors : English fluent Good communication at designer level and management level, Positive person High customer orientation, Curious to learn and adapt managing ambiguity and design conflicts Fast learning Flexible and adaptive own BU challenges as his / her and work with BU design teams for resolution Flexible working hours management : working hours and week end support (when needed),
Keyskills :
front end designfront endeda toolsdesign flowhisedartliotcdclsfnxpupfperlvhdllintfrontend designconnectivity solutionstcl