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Job Location | Pune |
Education | Not Mentioned |
Salary | Not Disclosed |
Industry | Manufacturing |
Functional Area | Embedded / System Software,General / Other Software |
EmploymentType | Full-time |
NXP SemiconductorsN.V. (NASDAQ: NXPI) enables secure connections for a smarter world, advancing solutions that make lives easier, better, and safer. As the world leader in secure connectivity solutions for embedded applications, NXP is driving innovation in the automotive, industrial & IoT, mobile, and communication infrastructure markets. Built on more than 60 years of combined experience and expertise, the company has approximately 29,000 employees in more than 30 countries and posted revenue of $8.61 billion in 2020.Primary Responsibilities: SoC design activities including top integration of various IP blocks, Clocking/Reset design, etc. Micro-architecture of IP block with RTL coding / enhancements / area optimization / synthesis Lint/CDC/Synthesis at block level as well chip level Digital and Analog IP integration at SoC level that may occasionally include modifying interface and building bridges etc. Can involve CPU-subsystem design primarily based on ARM processors (ARM CM3/CM4/CM7/Ax series etc.) Interact with PD/DFT/DV teams understand and resolve any issues and provide support as needed to build a high quality SoC Debug and fixing of chip/IP level issues during SoC design or IP design phaseRequired Qualifications: 5 years of experience Good knowledge of SoC design Hands on experience with Verilog HDL is a must familiarity with System Verilog is a plus Solid background in digital logic derequired Familiarity with industry standard tools for Lint/CDC/LEC/Simulations is required, familiarity with Synthesis/STA tools is plus Good exposure to different technology nodes (e.g. 40nm/28nm/16nm) is desirable A good team player, open minded outlook towards work and a desire to learn new domains/technologies Must have the ability to multi-task in a fast paced environment,
Keyskills :
logicvalidationverificationverilogfpgartl codingverilog hdlsystem verilogbuilding bridgesoptimization strategiessocrtliothdlnxpdesignmobileconnectivity solutions