Pre-Silicon Verification Manager

Job Description

Job ID: JRhidden_mobileJob Category: EngineeringPrimary Location: Pune, KA INOther Locations: India, BangaloreJob Type: Experienced HirePre-Silicon Verification Manager Job Description The Xeon Engineering (XEG) Group is seeking a senior pre-silicon verification Manager for IP/SoC. XEG is responsible for delivering on all aspects of System-on-Chip (SoC) design including logic design, pre-silicon validation, structural design, and design for testThe responsibilities include: development of validation strategies and plans, scoping and driving execution for different area of pre-Si validation. development of team integration and rapport, ensuring team members are motivated and able to be successful in their respective roles. provide guidance and help to team members in understanding issues, removing roadblocks and ensuring issue resolution. collaborate with validation teams globally on task assignments and milestone progress/updates. Hire to open requisitions, as needed and ramp up new individuals to the team Report out on progress to Senior Management Strong demonstration of Intel Cultural valuesOther deliverables include:Establishing resource and project plans, and driving verification activities to meet PLC requirements and roadmap schedules with highest quality.Driving new and innovative verification methodologies for continuous design verification and efficiency improvements.Grow and deliver design verification COE charter.Qualifications Minimum Qualifications: BE in Electrical/Electronics Engineering with 12+ years and ME/MS with 10+ experience in Electrical/Electronics Engineering or other related field of study in SOC Design and Verification.Extensive pre-silicon verification/design experience in ASIC/FPGA designs, IP development, IP/subsystem/SOC verification.Proven track record in managing/leading and coaching technical contributors to achieve on-time project milestones, e.g. tapeout with strong quality results, and driving innovation.Solid understanding and experience in UVM/OVM testbenches, Verification IP, test coding, RAL and system verilog assertion coding, Formal verification, Power-aware verification etc.Strong background in high speed protocols, e.g. PCIe, ethernet.Solid stakeholder management, excellent communication skills and ability to work with diverse team across different geography sites to resolve technical and other matters. Experience with supplier management.Ability to handle dynamic environment and ambiguity.Inside this Business Group Xeon and Networking Engineering (XNE) focuses on the development and integration of XEON and Networking SOCs and critical IPs sustain Intels Xeon and 5G networking roadmap.Other Locations India, BangaloreWork Model for this Role This role is available as fully home-based and generally would require you to attend Intel sites only occasionally based on business need.Legal Disclaimer:Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at www.jobs.intel.com and not fall prey to unscrupulous elements.INExperienced HireJRhidden_mobilePuneXeon Engineering Group (XEG),

Keyskills :
logic designsenior managementstructural designsystem verilogproject plansbehavioral trainingformal verification