Hyderabad Jobs |
Banglore Jobs |
Chennai Jobs |
Delhi Jobs |
Ahmedabad Jobs |
Mumbai Jobs |
Pune Jobs |
Vijayawada Jobs |
Gurgaon Jobs |
Noida Jobs |
Hyderabad Jobs |
Banglore Jobs |
Chennai Jobs |
Delhi Jobs |
Ahmedabad Jobs |
Mumbai Jobs |
Pune Jobs |
Vijayawada Jobs |
Gurgaon Jobs |
Noida Jobs |
Oil & Gas Jobs |
Banking Jobs |
Construction Jobs |
Top Management Jobs |
IT - Software Jobs |
Medical Healthcare Jobs |
Purchase / Logistics Jobs |
Sales |
Ajax Jobs |
Designing Jobs |
ASP .NET Jobs |
Java Jobs |
MySQL Jobs |
Sap hr Jobs |
Software Testing Jobs |
Html Jobs |
Job Location | Hyderabad |
Education | Not Mentioned |
Salary | Not Disclosed |
Industry | Recruitment Services |
Functional Area | General / Other Software |
EmploymentType | Full-time |
Develop verification testbench components for chip/ module level using System Verilog, C & PerlUse high level language concepts (Object oriented, UVM/ OVM/ VMM etc) to develop extendable environment.Define and execute detailed verification plan from spec working with architects, designers, system engineers.Write tests, automate regression scripts and regression environment.Incorporate code- coverage, functional coverage, assertions, cover- groups etc to achieve 100% verification completeness prior to tapeout.Debug tests, run gate level simulations at unit/ sdf delaysDevelop automated/ scripted design flows for the above mentioned development processesParticipate in FPGA/ silicon debug and analysisExcellent debugging skills in both SW and ASIC hardwareMust be proficient in Verilog (System Verilog preferred) .Proficiency in scripting language like Perl, Tcl/ Tk, Shell is a definite plus.Experience with simulators like ncVerilog (Incisive) , VCS and QuestaSim.Good understanding of latest formal verification techniques, assertions, OOP etc is a plus.Understanding or prior experience with Industry standard protocols like USB, SPI, SATA, Ethernet, DisplayPort, SRIO etc is a definite plusBE/ B.Tech, MS 2- 10 years of experience.,
Keyskills :
verificationuvmdesignfailure analysissystem veriloggui developmentspiusboopvcsvmmperlasicsatatestsverilogsiliconmal verification