FPGA Design and Verification/Validation Engineers

2.00 to 7.00 Years Hyderabad 30 May, 2022

Job Location	Hyderabad
Education	Not Mentioned
Salary	Not Disclosed
Industry	IT - Software
Functional Area	General / Other Software
EmploymentType	Full-time

Job Description

RTL Design 2+ YearsIP Verification 2+ YearsIP Design/ SOC Design 4+ YearsFPGA Design 6+ Years Independent In - charge of the FPGA Design Blocks Required Skill Sets: Experienced with any one of the Interfaces such as :- PCIe 2. 0, SATA, Fiber Channel, 1G/ 10G BASE- MII/ RMII/ GMII/ RGMII/ SGMII/ XAUI, RXAUI, - SDI - SD/ HD/ 3G , Display Port , USB, JESD204B, SRIO, - MIPI, DDR/ LPDDR/ DDR2/ DDR3, QDR memories Preferred Skills: Hands on Experience on Design and Debugging. Should had worked on projects based on FPGAs, SOC Domain Knowledge: SOC , Hi Speed Interfaces FPGA Designand Verification/ Validation Engineers IP Verification 2+ Years IP Design/ SOC Design 4+ Years FPGA Design6+ Years FPGA DesignBlocks - PCIe 2. 0, SATA, Fiber Channel, 1G/ 10G BASE - MII/ RMII/ GMII/ RGMII/ SGMII/ XAUI, RXAUI, - SDI - SD/ HD/ 3G , Display Port , USB, JESD204B, SRIO, - MIPI, DDR/ LPDDR/ DDR2/ DDR3, QDR memories Should had worked on projects based on FPGAs, SOC,

Keyskills :
validationdebugginginteltest casescustomer relationsrtl designfpga designsocrtlusbsdifpgasatapcieddr3mipixaui

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FPGA Design and Verification/Validation Engineers

Job Description

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