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Showing 101 - 150 of 1494 Jobs
Accenture
2.00 to 3.00 Years
Mumbai City
14 Feb, 2023
Innovation Testing - Market Research
- 6-8 years experience with prior experience in innovation testing
- Existing research methodology knowledge, experience in giving actionable business reco...
market researchproject management
Contify
4.00 to 9.00 Years
Bhubaneswar
01 Feb, 2023
Sygene
1.00 to 3.00 Years
Delhi
25 Jan, 2023
Sygene
10.00 to 15.00 Years
Delhi
25 Jan, 2023
JPMorgan
3.00 to 5.00 Years
Bangalore
18 Jan, 2023
Sygene
8.00 to 10.00 Years
Bangalore
09 Jan, 2023
TEKPILLAR
3.00 to 8.00 Years
Bangalore
09 Jan, 2023
Role : FPGA Engineer
Experience : 3 - 8 Years
Location : Bangalore
Job Description
Job description
Roles and Responsibilities
JD-Technical Authority Expert- RAN.
- Base Locations: TAE role will be required only at EGI Locations e.g. Noida, Gurgaon...
lteran
Sygene
1.00 to 3.00 Years
Delhi
20 Dec, 2022
JPMorgan
3.00 to 5.00 Years
Mumbai City
19 Dec, 2022
Hii !
Greetings for the day !
URGENT OPENING for Research Chemist / Senior Research Chemist, Medicinal Chemistry
Location - Manesar, Gurgaon.
Exp.- 1 yr. min.
Summary & Scope of Position:
P...
isis drawchemdrawhplc
Sygene
1.00 to 4.00 Years
Delhi
14 Dec, 2022
Sygene
1.00 to 4.00 Years
Chennai
10 Dec, 2022
Sygene
1.00 to 4.00 Years
Bangalore
10 Dec, 2022
Merck Ltd
1.00 to 3.00 Years
Bangalore
08 Dec, 2022
Merck Ltd
4.00 to 7.00 Years
Bangalore
08 Dec, 2022
Sygene
10.00 to 15.00 Years
Chennai
02 Dec, 2022
Key Responsibilities:
Supporting the Scientists from different business streams (Medicinal Chemistry, Discovery Biology, Process Development, Analytical, DMPK and Discovery Synthesis)...
managementmisqualitysalescustomer relations
Tape-out experience in RTL2GDS2 (Synthesis, FloorPlan, P&R, Sign-off closure in timing, LEC/CLP, power and physical like DRC/LVS/XOR etc., apart from DFM)
Strong timing & CTS fundamentals
Good ...
lightingestimation3d modellingahu
Dear Candidate,
Greetings of the day!
We are Hiring forSenior FPGA Design Engineer
Senior FPGA Design Engineer will be working on our existin...
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FPGA Design/Prototyping :
Experience in FPGA Design, Vivado Flows, Timing closure, Verilog coding
RTL integration and Simulation
Resolve the Synthesis and Timing issues.
Creating Test cases to str...
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Key responsibilities
JPMorgan
5.00 to 0.00 Years
Bangalore
22 Nov, 2022